MULTICLOCK DOMAIN PDF

238000004458 analytical method Methods 0.000 title claims description 38.Status Active legal-status Critical Current Adjusted expiration legal-status Critical Links Assignors: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LIMITED CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. LIMITED reassignment AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. Assigned to AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED MERGER (SEE DOCUMENT FOR DETAILS). TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Assignors: BANK OF AMERICA, N.A., AS COLLATERAL AGENT Assigned to AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. reassignment AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. Assigned to AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. Assignors: LSI CORPORATION Assigned to LSI CORPORATION, AGERE SYSTEMS LLC reassignment LSI CORPORATION TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Assignors: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT Assigned to BANK OF AMERICA, N.A., AS COLLATERAL AGENT reassignment BANK OF AMERICA, N.A., AS COLLATERAL AGENT PATENT SECURITY AGREEMENT Assignors: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: LSI LOGIC CORPORATION Assigned to AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. Assignors: YAN, FEI Publication of US20050039094A1 publication Critical patent/US20050039094A1/en Application granted granted Critical Publication of US7134062B2 publication Critical patent/US7134062B2/en Assigned to DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT reassignment DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT PATENT SECURITY AGREEMENT Assignors: AGERE SYSTEMS LLC, LSI CORPORATION Assigned to LSI CORPORATION reassignment LSI CORPORATION CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.) Filing date Publication date Application filed by LSI Logic Corp filed Critical LSI Logic Corp Priority to US10/639,701 priority Critical patent/US7134062B2/en Assigned to LSI LOGIC CORPORATION reassignment LSI LOGIC CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Original Assignee LSI Logic Corp Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)Īvago Technologies International Sales Pte Ltd ( en Inventor Fei Yan Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Granted Application number US10/639,701 Other versions US7134062B2

MULTICLOCK DOMAIN PDF

Google Patents Static timing analysis approach for multi-clock domain designsĭownload PDF Info Publication number US20050039094A1 US20050039094A1 US10/639,701 US63970103A US2005039094A1 US 20050039094 A1 US20050039094 A1 US 20050039094A1 US 63970103 A US63970103 A US 63970103A US 2005039094 A1 US2005039094 A1 US 2005039094A1 Authority US United States Prior art keywords delays clock clocks paths delay Prior art date Legal status (The legal status is an assumption and is not a legal conclusion. Google Patents US20050039094A1 - Static timing analysis approach for multi-clock domain designs US20050039094A1 - Static timing analysis approach for multi-clock domain designs

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